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Senior Digital Electronics Design Engineer

135,000 – 155,000 yearly

NPAworldwide Recruitment Network

Last Updated: 9/29/22

Job Description

Job description: We are seeking a talented engineer to join the digital IC design team.
The successful candidate will contribute to ASIC and FPGA development including design, synthesis, verification, validation, test & support.
Candidate must have experience using high level design, simulation and verification tools and be familiar with process flows supporting design and verification for digital ASIC / FPGA efforts. Proficiency with ASIC and SoC design and development process flows is required.
Preference will be given to candidates with an understanding of hardware security, radiation-hardened design, signal or image processing, filter design and algorithm
implementation in hardware.

Specific Responsibilities:
Requirements capture and derivation Architecture definition and performance analysis Integration of third-party IP Design implementation using SystemVerilog, Verilog or VHDL Familiarity with CDC, LEC and formal techniques Leading design and architecture teams Top-level chip integration
This opportunity is located on Odon, Indiana but is eligible for remote work.

Required Qualifications:
PhD or MSEE+6 preferred Strong analysis and problem solving skills Fluent in SystemVerilog/Verilog/VHDL Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc. Experience with high-level design, simulation, and verification tools Experience with scripting languages Python/PERL and regular expressions Ability to acquire and maintain a security clearance
Desired Qualifications:
Experience with Linux/UNIX OS, piping, batching, etc. Experience with SRAM compilers and architecture tradespace Familiarity with memory design for SRAM, DRAM, and NVRAM Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture Experience with emulation Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc. Familiarity with radiation-hardened design or design of space-qualified systems Active security clearance
Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance. Qualifications:

Required Qualifications:
PhD or MSEE+6 preferred Strong analysis and problem solving skills Fluent in SystemVerilog/Verilog/VHDL Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc. Experience with high-level design, simulation, and verification tools Experience with scripting languages Python/PERL and regular expressions Ability to acquire and maintain a security clearance

Desired Qualifications:
Experience with Linux/UNIX OS, piping, batching, etc. Experience with SRAM compilers and architecture tradespace Familiarity with memory design for SRAM, DRAM, and NVRAM Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture Experience with emulation Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc. Familiarity with radiation-hardened design or design of space-qualified systems Active security clearance
Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.

Why is This a Great Opportunity:

We are seeking a talented engineer to join the digital IC design team.
The successful candidate will contribute to ASIC and FPGA development including design, synthesis, verification, validation, test & support.

Salary Type : Annual Salary

Salary Min : 135000

Salary Max : 155000

Currency Type : US Dollars



Company Details

Grand Rapids, Michigan, United States
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