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ASIC Design Engineer

180,000 – 215,000 yearly

NPAworldwide Recruitment Network

Last Updated: 11/25/22

Job Description

Job description:

Front-End ASIC Design Engineer - Santa Clara, CA

Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. The Front-End ASIC Design Engineer will be a key person in this growing design department. Great opportunity to work on current, ongoing and upcoming new projects.

Key to this position:

Focus is on Micro-Architecture and front-end design with some exposure to Verification, Physical design and firmware. The candidate should have worked with AMBA protocols, done multi-clock designs, hands-on with Spyglass Lint/CDC checks. Complete lifecycle experience of major SOC projects is required. Domain knowledge in one or more of below areas is strongly desired:

CPU/GPU

Image/Video processing

High-speed interfaces (such as USB, PCIe)

Low-power design

Primary responsibilities include:

  • Work with customer, vendors and internal teams
  • Support customer's design through all phases of ASIC execution.
  • Ensure designs meets product performance requirements by performing related tasks. Contribute to microarchitecture, RTL design, synthesis, and timing closure.
  • Ensure deadline for project milestones are met.
  • Work effectively with internal teams, including verification, physical design, FPGA and firmware teams, some globally.
  • Display a results-focused attitude and accomplish Company/Team-goals.
Qualifications:

Required/Desired Qualifications:

  • Bachelor's Degree in EE or similar degree.
  • 3-8 years of professional design experience.
  • Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).
  • Experience with major SOC projects from start to finish.
  • Skills Required Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC analysis; timing analysis; excellent debug skills; customer support.
  • Teamwork, dedication, collaborative, strong interpersonal skills.
  • Ability to meet stringent deadlines and project timelines.
  • Skills Desired - Experience in at least few of these: CPU (preferably, ARM), or GPU, or DSP; low-power design and verification; peripheral interfaces such as CSI, I3C, USB, PCIe; FPGA.
  • Experience dealing with international teams in a small company environment is desired
Why is This a Great Opportunity:

Great company with a ton of IP, growth opportunity.

Salary Type : Annual Salary

Salary Min : 180000

Salary Max : 215000

Currency Type : US Dollars



Company Details

Grand Rapids, Michigan, United States
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